Notes on initial model test suite - 11AUG95 - Marc McSwain - marcm@metasw.com

This file contains a set of HSPICE test netlists intended to form the beginning
of a Sematech model QA test suite, notes on options and templates used, and
suggestions for improvement.

These tests are intended to help model developers and Sematech model evaluators
detect qualitative problems with a compact device model that would seriously
impair its chances of success as an industry standard model.  These tests by no
means form a complete model QA test suite; there is no such thing.  However,
each netlist contains comments about the object of each test, and it's usually
easier to modify an existing netlist than to start from scratch.  Single devices
are the target for these tests, not large circuits.

HSPICE allows the use of parameters and element printback templates, which
simplifies netlist creation considerably.  The HSPICE .measure statement was not
used in thest tests.  It is assumed that users of other simulators will be able
to modify these netlists to run via a more 'vanilla' SPICE.

All of the netlists use a common set of options.  TNOM=27 sets the nominal
simulation temperature (HSPICE usually defaults to 25'C).  GMIN is set very
small to minimize the influence of shunt conductances upon simulation results.
NUMDGT is set high to print many significant digits.  OPTS prints out all of the
options in effect in a simulation.  POST=2 allows use of the MetaWaves GUI for
postprocessing.  NOPAGE saves paper.  Simulations which sweep capacitances in a
.DC simulation use the DCCAP option to force evaluation of capacitance equations
for the sweep.

Tolerances and many other options can be specified; the object is to test the
behavior of the device model with as much precision as possible.

The HSPICE .data statement was not used.  Values of sweep limits or initial bias
points were arbitrarily chosen and may need to be modified via such a statement.
Similarly, quantitative comparison of measured and modeled data is not included
in these tests, as different simulators may use different means of importing
data.  Awk or perl scripts can be written to help automate the model QA process,
but such scripts can be very simulator-dependent.

These tests are for NMOS devices only, but should be replicated for PMOS devices
as well.  A fully parameterized typical model called nch.mod is .INCLUDEd in
most netlists, though some require a model with no parasitic resistances in a
file called nornch.mod.  Arbitrary Level 28 models were used for initial netlist
functional evaluation.  These are not measurement-based Meta Labs models.

The name mtest1.sp was reserved for a summary table of model features, which has
not yet been developed.  Note that mtest13.sp is incomplete at this time.

Thanks to Colin McAndrew, H. K. Gummel, Bill Scott, Yannis Tsividis, and Ken
Suyama for test ideas.  Anyone with additional ideas for test netlists should
submit them (or test netlists) to the Sematech model quality assurance /
benchmarking group.

*MTEST2 OUTPUT CHARACTERISTICS TEST
*HSPICE SEMATECH MODEL QA NETLIST
*The object of this test is to check the output characteristics of a device.
*Id, go, and 1/go are plotted against Vds.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 3 4 nch
VD 1 5 DC 1
VG 2 6 DC 1
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VD 0 1 1E-3 VG 0 1 .1
.PRINT DC I(VDSENSE) lx8(M1) x=par('1/lx8(M1)')
*         ID         go      1/go
.END

*MTEST3 THRESHOLD CHARACTERISTICS TEST
*HSPICE SEMATECH MODEL QA NETLIST
*The object of this test is to check the threshold characteristics of a device.
*Id and gm are plotted against Vgs.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 3 4 nch
VD 1 5 DC 1
VG 2 6 DC 1
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VG 0 4 2E-3
.PRINT DC I(VDSENSE) lx7(M1)
*         ID         gm
.END

*MTEST4 SUBTHRESHOLD CHARACTERISTICS TEST
*HSPICE SEMATECH MODEL QA NETLIST
*The object of this test is to check the subthreshold characteristics of a
*device.  log(Id) is plotted against Vds.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 3 4 nch
VD 1 5 DC 3
VG 2 6 DC 1
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VD 0 4 1E-3
.PRINT DC I(VDSENSE) x=par('log(I(VDSENSE))')
*         ID         log(ID)
.END

*MTEST5 ISAT VS. TEMPERATURE AND VSB TEST
*HSPICE SEMATECH MODEL QA NETLIST
*The object of this test is to check Isat (Id when Vdb=Vgb=Vdd) versus 
*temperature and Vsb, for short and long devices.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
.PARAM LENG=0.5E-6
M1 1 2 3 4 nch L=LENG W=1.0E-6
VD 1 5 DC 5
VG 2 6 DC 5
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.TEMP -20 0 20 40 60
.DC VS 0  1 .1
.PRINT DC I(VDSENSE)
.ALTER
.PARAM LENG=50E-6
.END

*MTEST5B VDIODE VS. TEMPERATURE AND VSB TEST
*HSPICE SEMATECH MODEL QA NETLIST
*The object of this test is to check Vdiode (Vdb when Vdb=Vgb and Id=0.1uA*W/L)
*versus temperature and Vsb, for short and long devices.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
.PARAM LENG=0.5E-6
.PARAM WIDT=1.0E-6
M1 1 1 2 0 nch L=LENG W=WIDT
I1 0 1 DC 1E-7*WIDT/LENG
VS 2 0 DC 0
.OP
.DC VS 0 1 .1
.TEMP -20 0 20 40 60
.PRINT DC V(1)
.ALTER
.PARAM LENG=50E-6
.END

*MTEST6 ISAT*LMASK VS. LMASK TEST
*HSPICE SEMATECH MODEL QA NETLIST
*The object of this test is to check Isat*Lmask (where Isat=Id when Vdb=Vgb=Vdd
*and Lmask=masked channel length) versus Lmask.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
.PARAM LMASK=0.5E-6
M1 1 2 3 4 nch L=LMASK W=1.0E-6
VD 1 5 DC 5
VG 2 6 DC 5
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VB 0 0 1
.PRINT DC x=par('LMASK*I(VDSENSE)') y=par('LMASK')
.ALTER
.PARAM LMASK=1E-6
.ALTER
.PARAM LMASK=2E-6
.ALTER
.PARAM LMASK=4E-6
.ALTER
.PARAM LMASK=8E-6
.END

*MTEST6B VDIODE VS. LMASK TEST
*HSPICE SEMATECH MODEL QA NETLIST
*The object of this test is to check Vdiode (Vdb when Vdb=Vgb and Id=0.1uA*W/L)
*versus Lmask.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
.PARAM LMASK=0.5E-6
.PARAM WIDT=1.0E-6
VZ 2 0 DC 0
RZ 2 0 1
M1 1 1 0 0 nch L=LMASK W=WIDT
I1 0 1 DC 1E-7*WIDT/LENG
.OP
.DC VZ 0 0 1
.PRINT DC x=par('LMASK') V(1)
.ALTER
.PARAM LMASK=1E-6
.ALTER
.PARAM LMASK=2E-6
.ALTER
.PARAM LMASK=4E-6
.ALTER
.PARAM LMASK=8E-6
.END

*MTEST7 ISAT/WMASK VS. WMASK TEST
*HSPICE SEMATECH MODEL QA NETLIST
*The object of this test is to check Isat/Wmask (where Isat=Id when Vdb=Vgb=Vdd
*and Wmask=masked channel width) versus Wmask.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
.PARAM WMASK=0.5E-6
.PARAM LENG=1.0E-6
M1 1 2 3 4 nch L=LENG W=WMASK
VD 1 5 DC 5
VG 2 6 DC 5
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VB 0 0 1
.PRINT DC x=par('I(VDSENSE)/WMASK') y=par('WMASK')
.ALTER
.PARAM WMASK=1E-6
.ALTER
.PARAM WMASK=2E-6
.ALTER
.PARAM WMASK=4E-6
.ALTER
.PARAM WMASK=8E-6
.END

*MTEST7B VDIODE VS. WMASK TEST
*HSPICE SEMATECH MODEL QA NETLIST
*The object of this test is to check Vdiode (Vdb when Vdb=Vgb and Id=0.1uA*W/L)
*versus Wmask.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
.PARAM WMASK=0.5E-6
.PARAM LENG=1.0E-6
VZ 2 0 DC 0
RZ 2 0 1
M1 1 1 0 0 nch L=LENG W=WMASK
I1 0 1 DC 1E-7*WMASK/LENG
.OP
.DC VZ 0 0 1
.PRINT DC x=par('WMASK') V(1)
.ALTER
.PARAM WMASK=1E-6
.ALTER
.PARAM WMASK=2E-6
.ALTER
.PARAM WMASK=4E-6
.ALTER
.PARAM WMASK=8E-6
.END

*MTEST8 WEAK/MODERATE INVERSION TEST
*HSPICE SEMATECH MODEL QA NETLIST 
*The object of this test is to check the transition from weak to moderate 
*inversion in a given MOS model. 
*For a Vds value in the saturation region, plot log(Id) vs. Vgs, including Vgs
*values well below threshold. 
*There should be no discontinuities nor kinks.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 3 4 nch
VD 1 5 DC 3
VG 2 6 DC 1
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VG 0 4 1E-3
.PRINT DC I(VDSENSE) x=par('log(I(VDSENSE))')
*         ID         log(ID)
.END

*MTEST9 GM/ID TEST
*HSPICE SEMATECH MODEL QA NETLIST 
*The object of this test is to check the transconductance-to-current ratio
*gm/Id vs. Vgs, including Vgs values well below threshold, or vs. log(Id).
*There should be no discontinuities nor kinks.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 3 4 nch
VD 1 5 DC 3
VG 2 6 DC 1
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VG 0 4 1E-3
.PRINT DC I(VDSENSE) x=par('log(I(VDSENSE))') y=par('lx7(M1)/I(VDSENSE)')
*         ID         log(ID)                  gm/ID
.END

*MTEST10 GDS TEST
*HSPICE SEMATECH MODEL QA NETLIST 
*The object of this test is to observe the output conductance gds vs. Vds for
*one or more values of Vgs.
*There should be no discontinuities nor kinks.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 3 4 nch
VD 1 5 DC 1
VG 2 6 DC 1
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VG 0 1 .1 VD 0 1 1E-3
.PRINT DC I(VDSENSE) lx8(M1)
*         ID         go
.END

*MTEST11 SERIES DEVICE FREQUENCY RESPONSE
*HSPICE SEMATECH MODEL QA NETLIST 
*The object of this test is to check the frequency response of Id to a Vgs
*stimulus for a single very long-channel device and for an equivalent device
*made of two transistors in series (each having half the length of the single
*device, gates and bulks connected together, one drain connected to the other
*source).
*NOTE: This test should use device models with all parameters having to do with
*parasitics such as junction and overlap capacitances, series resistors, etc.
*removed, and with no source nor drain areas specified.
*The frequency responses should be identical.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nornch.mod'
m1 1 2 0 0 nornch w=3u l=100u
m2 3 2 4 0 nornch w=3u l=50u
m3 4 2 0 0 nornch w=3u l=50u
vd2 3 0 dc 4
vd 1 0 dc 4
vg 2 0 dc 3 ac 1
.ac dec 101 1 10g
.print ac im(vd) im(vd2)
.END

*MTEST12 RESISTIVE NOISE TEST
*HSPICE SEMATECH MODEL QA NETLIST 
*The object of this test is to check the thermal noise of the MOS channel.
*Bias a device with a fixed Vgs in strong inversion, and at Vds=0 by placing a
*zero-value dc current source between drain and source.  Run a noise simulation
*for a frequency low enough so that the result is not affected by capacitances.
*The channel should show thermal noise voltage with power spectral density of
*4kTR where R=1/gds.
*k=Boltzmann's constant=1.3806226E-23  T=temperature in Kelvins='C+273.15
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nornch.mod'
m1 1 2 0 3 nornch w=3u l=2u
id 0 1 dc 0
vb 3 0 dc 0
vin 2 0 dc 2 ac 1
.ac dec 10 1 1E9
.noise v(1) vin 1
.END

*MTEST13 NOISE WIDTH SCALING TEST (THIS NETLIST IS INCOMPLETE)
*HSPICE SEMATECH MODEL QA NETLIST 
*The object of this test is to check the width scaling of 1/f noise.
*Bias a device in strong inversion saturation and run a noise simulation at
*frequencies where 1/f noise should be dominant.  Convert the noise current to a
*voltage across a one Ohm resistor (or, even better, a "noiseless resistor" via
*a self-dependent voltage-controlled current source).  Now, increase the channel
*width by a factor of 10 and see whether the noise power spectral density
*decreases by a factor of 10.  Also, see if the noise current is insensitive to
*changes in Vgs, as it should be for most devices.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
.PARAM WIDT=1.0E-6
M1 1 2 3 4 nch W=WIDT L=1.0E-6
VD 1 5 DC 5
VG 2 6 DC 3 AC 1
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.ALTER
.PARAM WIDT=1.0E-5
.END

*MTEST14 TRANSCONDUCTANCE VS. VGB TEST
*HSPICE SEMATECH MODEL QA NETLIST
*The object of this test is to check transconductance versus a fine Vgb sweep.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 3 4 nch
VD 1 5 DC 1
VG 2 6 DC 1
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VG 0 4 2E-3
.PRINT DC lx7(M1)
*         gm
.END

*MTEST15 OUTPUT CONDUCTANCE WIDE RANGE TEST
*HSPICE SEMATECH MODEL QA NETLIST
*The object of this test is to check output conductance over a wide bias range
*with a fine Vdb step.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 3 4 nch
VD 1 5 DC 1
VG 2 6 DC 1
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VD 0 1 1E-3 VG -2 5 .1
.PRINT DC lx8(M1)
*         go
.END

*MTEST16 OUTPUT CONDUCTANCE LIMITED RANGE TEST
*HSPICE SEMATECH MODEL QA NETLIST
*The object of this test is to check output conductance with fixed Vgb and Vsb
*values over a limited range of Vdb with a fine Vdb sweep.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 3 4 nch
VD 1 5 DC 1
VG 2 6 DC 1
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VD 0 1 1E-3 VG 0 1 .1
.PRINT DC lx8(M1)
*         go
.END

*MTEST17 DRAIN CURRENT SYMMETRY TEST
*HSPICE SEMATECH MODEL QA NETLIST 
*The object of this test is to check the symmetry of Id.
*Drive a MOSFET with Vgb, Vsb=Vsb-Vx, and Vdb=Vdb+Vx.
*Id must be an odd function of Vx, so Id(Vx)=-Id(-Vx), and the second partial
*derivative of Id with respect to Vx must be zero at Vx=0.
*Plot gx=partial derivative of Id with respect to Vx for a fine grid near Vx=0V.
*Asymmetric models will have a break in gx near Vx=0.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
VX 7 0 DC 0
RX 7 0 1
M1 1 2 3 0 nch
VGB 2 0 DC 3
VDB1 1 5 DC 2
VSB1 3 6 DC 1
E1 0 6 7 0 1
E2 5 0 7 0 1
.OP
.DC VX -.1 .1 .001
.PRINT DC I1(M1)
.END

*MTEST18 SLOPE RATIO TEST
*HSPICE SEMATECH MODEL QA NETLIST 
*The object of this test is to check the asymptotic Vdb behavior.
*Consider I1(Vdb=V1) and I2(Vdb=V2) for small Vdb and Vsb=0.
*Plot SR=((I2+I1)*(V2-V1)/((I2-I1)*(V2+V1)) against Vgb.  This is the ratio of
*the slope of the line through the origin and the midpoint of (V1,I1) and
*(V2,I2) to the slope of the line through (V1,I1) and (V2,I2).  In subthreshold,
*SR should reach an asymptote determined by T and by the values of V1 and V2.
*Above threshold, SR should approach unity (1.0).  This shows problems with
*kinks/glitches and with poor subthreshold modeling.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
.PARAM GATE=0
.PARAM VDRAIN1=0.1
.PARAM VDRAIN2=0.2
M1 1 3 0 0 nch
M2 4 6 0 0 nch
VD1 1 2 DC VDRAIN1
VSNS1 2 0 DC 0
VG1 3 0 DC GATE
VD2 4 5 DC VDRAIN2
VSNS2 5 0 DC 0
VG2 6 0 DC GATE
.DC GATE 0 2 .001
.PRINT DC 
+ x=par('((I(VSNS2)+I(VSNS1))*(V(4)-V(1)))/((I(VSNS2)-I(VSNS1))*(V(4)+V(1)))')
.END

*MTEST19 TREETOP CURVE TEST
*HSPICE SEMATECH MODEL QA NETLIST 
*The object of this test is to check asymptotic Vgb behavior in subthreshold.
*For a long channel MOSFET with uniform doping, gm/Id in subthreshold
*asymptotically approaches a value that depends on Vgb. For large Vgb, the
*asymptote approaches the reciprocal thermal voltage. The asymptotic behavior
*is in the absence of junction leakage currents. The behavior is observed in
*practice in long channel MOSFETs. The asymptotic value is nearly, but not
*quite, reached for short MOSFETs. This shows problems in models with simple
*(unphysical) subthreshold modeling.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 0 0 nch L=100E-6 W=10E-6
VD 1 3 DC 2
VG 2 0 DC 1
VDSENSE 0 3 DC 0
.OP
.DC VG 0 5 .01
.PRINT DC y=par('lx7(M1)/I(VDSENSE)')
*                 gm/Id
.END

*MTEST20 GATE CAPACITANCE TEST
*HSPICE SEMATECH MODEL QA NETLIST 
*The object of this test is to check gate capacitance terms over bias.
*Plot Cgg, Cgb, and Cgs+Cgd against Vgb for Vsb=0 and Vdb=0 (and Vdb=1.5V),
*using a fine Vgb step.
*This shows unphysical abrupt boundaries at flatband and threshold.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 3 4 nch
VD 1 5 DC 0
VG 2 6 DC 1
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VG -5 5 .01
.OPTION DCCAP
.PRINT DC lx18(M1) x=par('lx20(M1)+lx19(M1)')
*         Cgg        Cgs+Cgd
+y=par('lx18(M1)-lx19(M1)-lx20(M1)')
*  Cgb=Cgg-Cgd-Cgs
.ALTER
VD 1 5 DC 1.5
.END

*MTEST21 CAPACITANCE COEFFICIENT TEST
*HSPICE SEMATECH MODEL QA NETLIST 
*The object of this test is to check capacitance terms over bias.
*Plot Cgs, Cgd, Cgb, Cbs, Cbd, Csd, Cdg, Cdb, Cbg against Vdb for Vsb=0 and
*Vgb=Vdd.  This shows asymmetries and discontinuities, and inconsistent
*saturation, wrong sign.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 3 4 nch
VD 1 5 DC 5
VG 2 6 DC 5
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.OPTION DCCAP
.DC VD -5 5 .01
.PRINT DC lx20(M1) lx19(M1) a=par('lx18(M1)-lx19(M1)-lx20(M1)')
*         Cgs      Cgd        Cgb=Cgg-Cgd-Cgs
.PRINT DC lx23(M1) lx22(M1) b=par('lx33(M1)-lx19(M1)-lx22(M1)')
*         Cbs      Cbd        Csd=Cdd-Cgd-Cbd
.PRINT DC lx32(M1) lx21(M1) c=par('lx33(M1)-lx32(M1)-lx34(M1)')
*         Cdg      Cbg        Cdb=Cdd-Cdg-Cds
.END

*MTEST22 OUTPUT CONDUCTANCE TEST
*HSPICE SEMATECH MODEL QA NETLIST 
*The object of this test is to check output conductance on a log scale.
*Plot log(gds) versus Id. This shows bugs in output conductance modeling and
*kinks/glitches at region boundaries.
.OPTION TNOM=27 GMIN=1E-14 NUMDGT=9 OPTS POST=2 NOPAGE
.WIDTH OUT=80
.INCLUDE 'nch.mod'
M1 1 2 3 4 nch
VD 1 5 DC 1
VG 2 6 DC 1
VS 3 7 DC 0
VB 4 8 DC 0
VDSENSE 0 5 DC 0
VGSENSE 0 6 DC 0
VSSENSE 0 7 DC 0
VBSENSE 0 8 DC 0
.OP
.DC VD 0 1 1E-3 VG 0 1 .1
.PRINT DC I(VDSENSE) x=par('log(lx8(M1))/log(10)')
*         ID         logbase10(go)
.END

simple batch script:
./hspice mtest2.sp > mtest2.lis
./hspice mtest3.sp > mtest3.lis
./hspice mtest4.sp > mtest4.lis
./hspice mtest5.sp > mtest5.lis
./hspice mtest5b.sp > mtest5b.lis
./hspice mtest6.sp > mtest6.lis
./hspice mtest6b.sp > mtest6b.lis
./hspice mtest7.sp > mtest7.lis
./hspice mtest7b.sp > mtest7b.lis
./hspice mtest8.sp > mtest8.lis
./hspice mtest9.sp > mtest9.lis
./hspice mtest10.sp > mtest10.lis
./hspice mtest11.sp > mtest11.lis
./hspice mtest12.sp > mtest12.lis
./hspice mtest13.sp > mtest13.lis
./hspice mtest14.sp > mtest14.lis
./hspice mtest15.sp > mtest15.lis
./hspice mtest16.sp > mtest16.lis
./hspice mtest17.sp > mtest17.lis
./hspice mtest18.sp > mtest18.lis
./hspice mtest19.sp > mtest19.lis
./hspice mtest20.sp > mtest20.lis
./hspice mtest21.sp > mtest21.lis
./hspice mtest22.sp > mtest22.lis

nch.mod:
.model nch nmos level=28 muz=600 x3ms=5 vfb0=-0.3 k1=0.6 phi0=0.65 cj=3e-4
+ cjsw=3e-10 js=1e-5 rsh=0 acm=2 ld=0.05u cgdo=2e-10 cgso=2e-10 tox=200
*note this is an arbitrary model, a complete typical model should be used.

nornch.mod:
.model nornch nmos level=28 muz=600 x3ms=5 vfb0=-0.3 k1=0.6 phi0=0.65 cj=3e-4
+ cjsw=3e-10 js=1e-5 rsh=0 acm=2 ld=0.05u cgdo=2e-10 cgso=2e-10 tox=200
*note this is an arbitrary model, a typical model (with parasitic resistances
*turned off) should be used.